Development History of PCB Fabrication Technology
Development History of PCB Fabrication Technology
Based on current documentation and development process of PCBs (printed circuit boards), development history of PCB fabrication technology can be classified into three phases: Phase#1: From the beginning of 20th century to 1950. This period can be regarded as an initial stage of PCB manufacturing, that is, earlier stage prior to PCB industrialization when PCB industry didn't get formed. Phase#2: From 1950 to 1990. It is a growth stage, that is, earlier stage of PCB industrialization when PCBs have become an industry. Phase#3: From 1990 to present. This period can be regarded as development stage, that is, the mid stage of PCB industrialization.
Initial Stage of PCB Fabrication
Initial stage of PCB fabrication has witnessed the following technologies: a. In 1925, Charles Ducas, an American, indicated that grooves can be generated on medium with conductive paste filled in and then electro plating is carried out with conductors formed. b. In 1936, Paul Ai Sile, an Austrian, tested a foil membrane technology within a radio. In 1943, he applied for the patent of obtaining wires through etching off useless metal. c. In 1936, Miyamoto Kinosuke, from Japan, applied for the patent of metabolic re co nn Law blowing wiring method. d. In 1938, glass fiber started being manufactured; e. In 1941, the US began to make use of PCB technology into military applications; f. In 1947, epoxy resin was introduced into PCB industry as substrate material; g. In 1947, Signal Corps in the US successfully defeated adhesion issue between large-area copper foil and insulating material; h. In 1947, NBS (National Bureau of Standards) in the US carried out research on coil, capacitor and resistor; i. In 1950, Japanese company tried coating silver on glass substrate as conductor and using copper foil as conductor on phenolic resin paper substrate; j. Since the year of 1950, fabrication technology of printed circuit began to be widely accepted when etching played a leading role;
When it comes to the three key representatives during initial stage of PCB fabrication, methods applied by Charles Ducas and Miyamoto Knosuke belong to additive process while the method by Paul Ai Sile belongs to subtractive process. Because subtractive process was first industrialized in PCB fabrication and receives the widest popularity, Paul Ai Sile is regarded as “Father of PCB”.
Growth Stage of PCB Fabrication
This period features the following standard technologies for PCB fabrication: a. In 1951, polyimide material came into being; b. In 1953, Motorola Company from US produced double-sided PCBs with plated through holes (PTH); Approximately in 1955, Toshiba Company from Japan introduced a type of technology with copper oxide generated on the surface of copper foil and copper clad laminate (CCL) arrived. Both technologies were later used to contribute to multi-layer PCB fabrication so that they play a role in contributing to the advent of multi-layer PCBs that are capable of improving tracing rate. Since then, multi-layer PCBs have been widely applied. c. In 1954, General Electric from the US took advantage of metal conductor protective layer fabrication technology with terne metal playing a role in withstanding corrosion; d. In 1960, V. Dahlgreen invented circuit image drawing by bonding metal foil on thermoplastic film, which witnessed the beginning of Flexible PCBs; e. In 1960, some companies from Japan began to print multi-layer PCBs with epoxy resin glass fiber as substrate material; f. In 1963, Hazeltine Research Inc from the US applied for the patent of using PTH to produce multi-layer PCBs; g. In 1964, Western Electric from the US developed a metal core PCBs with high thermal dissipation capability; h. In 1965, some companies from Japan created FR4 and FR5 PCBs using epoxy resin glass fiber as substrate material; i. In 1967, Robert J. Ryan from RCA Company applied for the patent of BUM (build up multi-layer) PCB which was first presented by the industry; j. In 1968, DuPont Company from the US invented photopolymer dry film; k. In 1969, Sanyo Company from Japan developed insulated metal substrate CCL; l. In 1969, Philips Company from Holland developed Flexible PCBs with polyimide as substrate material; m. In 1977, Mitsubishi Gas Chemical Company from Japan developed BT resin; n. In 1979, Pactel Company invented Pactel Law BUM technology; o. In 1982, Glen E. Leinbach from HP company in the US developed multilayer substrate with microvia whose aperture is 0.125mm; p. In 1984, NTT created ceramic base PCB, copper polyimide act, holding a membrane circuit. Its insulating layer is photosensitive resin and vias are generated through exposure of photosensitive resin and imaging; q. In 1988, Siemens developed Microwiring Substrate BUM PCB with more than 10 layers, applicable for large-scale computers and blind via was created through excimer laser.
Development Stage of PCB Fabrication
• Typical Technology
During this stage, leading technologies concerning PCB fabrication include the following items. a. In 1990, IBM (Yasu) Company from Japan developed SLC (surface laminar circuit) board on which flip chip that is semiconductor can be conneted; b. In 1993, Paul T. Lin from Motorola applied for a patent for a type of BGA (ball grid array) package, indicating the beginning of organic board package; c. In 1995, Panasonic Company developed ALIVH (Any Layer Interstitial Via Hole) structure for BUM PCB fabrication technology; d. In 1996, Toshiba developed B2it (Buried Bump Interconnection Technology); e. North Company from Japan developed NMBI (Neo-Manhanttan Bump Interconnection) technology and Tessera from USA made some improvement; f. Ibiden developed FVSS (Free Via Stacked up Structure) technology that was originally called SSP (Single Step Process);
• HDI PCBs
When it comes to HDI products based on laser drilling plus electroplating copper technology, HDI technology has gone through such conversions for the past 20 years as below:
At present, the typical product (any layer) of HDI PCBs is widely applied by cell phones. Take Samsung S8 cell phone as an example, its mother board is designed to be a 12-layer any layer HDI PCB with BGA pitch being 350mm and board thickness being 650mm. Recently, new technologies concerning HDI PCBs include ultra-thin PCBs, Cavity etc.
• Substrate Products
At present, typical products where substrate is applied include cell phones, computer master processor etc. Recently, the industry has seen numerous new technologies in terms of substrate. Due to specialty of substrate products, lots of technologies are directly developed by packaging company or chip company. Partial typical technologies include: a. BBUL. In October of 2001, Steven N. Towle from Intel brought forward BBUL (bumpless build-up layer packaging) and interconnection between chip and board is achieved through chip embedment into board. b. EPS/EAD. EPS (embedded passive substrate) started to be volume produced in 2011. EAD (embedded active device) is seldom mass produced. c. ECP. AT&S developed ECP (embedded component packaging) technology based on which passive and active components can be embedded. d. SESUB. TDK developed SESUB (semiconductor embedded in SUBstrate) technology. e. MCeP. Shinko Electric developed MCeP (molded core embedded package) technology that is capable of embedding active and passive components. f. Coreless. Coreless technology is classified into two types: Coreless and ETS (embedded trace substrate). The former is usually applied in mid or low-level flip chip package that went prevalent since 2013. g. Padless. Padless technology aims to improve tracing density and design flexibility. h. BSP. BSP, short for blue stencil printing, was developed to improve yield rate and efficiency of fine pitch bump with metal mask replaced. i. Via Post. Via post is developed by ACCESS. It is a via generation technology with no use of laser drilling and plated hole filling. j. MIS. MIS, short for molded interconnect substrate/system, was first developed by APSi. It is a type of technology with epoxy resin as substrate.
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